XC...

Xilinx

XC17256DPC

QPRO Family of XC1700D QML Configuration PROM Datenblatt: XC17256D.pdf

€ 2 .09*

Xilinx

XC1736A

Beschreibung: One Time Programmable Serial Configuration PROM Datenblatt: XC1736.pdf

€ 2 .30*

Xilinx

XC17S50LPC

Beschreibung: Spartan/XL Family One-Time Programmable Configuration PROMs Datenblatt: XC17S50.pdf

€ 2 .30*

Xilinx

XC18V02VQ44C

XC18V00 Series In-System-Programmable Configuration PROMs - In-System Programmable 3.3V PROMs for Configuration of Xilinx FPGAs - Endurance of 20,000 Program/Erase Cycles - Program/Erase Over Full Industrial Voltage and Temperature Range (–40°C to +85°C) - IEEE Std 1149.1 Boundary-Scan (JTAG) Support - JTAG Command Initiation of Standard FPGA Configuration - Simple Interface to the FPGA - Cascadable for Storing Longer or Multiple Bitstreams - Low-Power Advanced CMOS FLASH Process - Dual Configuration Modes - Serial Slow/Fast Configuration (up to 33 MHz) - Parallel (up to 264 Mb/s at 33 MHz) - 5V-Tolerant I/O Pins Accept 5V, 3.3V and 2.5V Signals - 3.3V or 2.5V Output Capability - Design Support Using the Xilinx ISE™ Foundation™ Datenblatt: XC18V04VQG44C.pdf

€ 20 .00*

Xilinx

XC18V04VQG44C

€ 42 .00*

Xilinx

XC2C128-7VQ100C

CoolRunner-II CPLD • Optimized for 1.8V systems - As fast as 5.7 ns pin-to-pin delays - As low as 13 ?A quiescent current • Industry’s best 0.18 micron CMOS CPLD - Optimized architecture for effective logic synthesis - Multi-voltage I/O operation — 1.5V to 3.3V • Advanced system features - Fastest in system programming · 1.8V ISP using IEEE 1532 (JTAG) interface - IEEE1149.1 JTAG Boundary Scan Test - Optional Schmitt-trigger input (per pin) - Unsurpassed low power management · DataGATE enable (DGE) signal control - Two separate I/O banks - RealDigital 100% CMOS product term generation - Flexible clocking modes · Optional DualEDGE triggered registers · Clock divider (divide by 2,4,6,8,10,12,14,16) · CoolCLOCK - Global signal options with macrocell control · Multiple global clocks with phase selection per macrocell · Multiple global output enables · Global set/reset - Advanced design security Datenblatt: XC2C128.pdf

€ 6 .50*

Xilinx

XC2S200-5FG256C

Spartan-II 2.5V FPGA Automotive IQ Product Family - Guaranteed to meet full electrical specifications over TJ = –40°C to +125°C - Second generation ASIC replacement technology - Densities as high as 5,292 logic cells with up to 200,000 system gates - Streamlined features based on Virtex architecture - Unlimited reprogrammability - SelectRAM+™ hierarchical memory: - 16 bits/LUT distributed RAM - Configurable 4K-bit block RAM - Fast interfaces to external RAM - Fully PCI compliant - Low-power segmented routing architecture - Full readback ability for verification/observability - Dedicated carry logic for high-speed arithmetic - Dedicated multiplier support - Cascade chain for wide-input functions - Abundant registers/latches with enable, set, reset - Four dedicated DLLs for advanced clock control - Four primary low-skew global clock distribution nets - IEEE 1149.1 compatible boundary scan logic - Family footprint compatibility in common packages - 16 high-performance interface standards - Zero hold time simplifies system timing - Fully supported by powerful Xilinx development system - Foundation™ ISE Series: Fully integrated software - Alliance Series™: For use with third-party tools - Fully automatic mapping, placement, and routing Datenblatt: XC2S200.pdf

€ 27 .00*

Xilinx

XC2S200-5PQ208I

€ 25 .00*

Xilinx

XC2S400E-6FT256C

Spartan-IIE FPGA Family - Densities as high as 15,552 logic cells with up to 600,000 system gates - Streamlined features based on Virtex®-E FPGA architecture - Unlimited in-system reprogrammability - Very low cost - Cost-effective 0.15 micron technology - Fully 3.3V PCI compliant to 64 bits at 66 MHz and CardBus compliant - Low-power segmented routing architecture - Dedicated carry logic for high-speed arithmetic - Efficient multiplier support - Cascade chain for wide-input functions - Abundant registers/latches with enable, set, reset - Four dedicated DLLs for advanced clock control - Eliminate clock distribution delay - Multiply, divide, or phase shift - Four primary low-skew global clock distribution nets - IEEE 1149.1 compatible boundary scan logic Datenblatt: XC2S400E.pdf

€ 100 .00*

Xilinx

XC2VP40-6FF1152C

Beschreibung: Virtex-ii Pro Field Programmable Gate Array Datenblatt: XC2VP40.pdf

€ 500 .00*

Xilinx

XC3020-70PC68C

Beschreibung: Field Programmable Gate Arrays Datenblatt: XC3020.pdf

€ 6 .50*

Xilinx

XC3S200A-4FTG256C

Beschreibung: Spartan-3A FPGA Datenblatt: XC3S200A.pdf

€ 14 .00*

Xilinx

XC3S400-4FT256C-ESA

Spartan-3 FPGA Datenblatt: XC3S400.pdf

€ 10 .00*

Xilinx

XC3S500E-4PQG208I

FPGA - Field Programmable Number of Logic Elements: 10476 LE Number of I/Os: 158 I/O Supply Voltage - Min: 1.14 V Supply Voltage - Max: 1.26 V Distributed RAM: 73 kbit Embedded Block RAM - EBR: 360 kbit Maximum Operating Frequency: 300 MHz Number of Gates: 500000 Minimum Operating Temperature: - 40 C Maximum Operating Temperature: + 100 C Datenblatt: XC3S500E.pdf

€ 112 .50*

Xilinx

XC3SD3400A-4CSG484I

Spartan-3A DSP FPGA - Very low cost, high-performance DSP solution for high-volume, cost-conscious applications - 250 MHz XtremeDSP DSP48A Slices - Dedicated 18-bit by 18-bit multiplier - Available pipeline stages for enhanced performance of at least 250 MHz in the standard -4 speed grade - 48-bit accumulator for multiply-accumulate (MAC) operation - Integrated adder for complex multiply or multiply-add operation - Integrated 18-bit pre-adder - Optional cascaded Multiply or MAC - Re-programmability Support Yes - Maximum Internal Frequency 667 MHz - Device Logic Cells 53712 - Screening Level Industrial - Maximum Operating Supply Voltage 1.26 V - Maximum Number of User I/Os 309 - Device Logic Gates 3400000 - Minimum Operating Supply Voltage 1.14 V - Operating Temperature -40 to 100 °C - Fabrication Technology 90nm Datenblatt: XC3SD3400A.pdf

€ 80 .00*

Xilinx

XC4003A-6PQ100C

Beschreibung: Logic Cell Array Datenblatt: XC4003.pdf

€ 30 .00*

Xilinx

XC4008-5PC84C

Beschreibung: Third Generation Field-Programmable Gate Arrays Datenblatt: XC4008.pdf

€ 50 .00*

Xilinx

XC4010E-4BG225C

Beschreibung: Field Programmable Gate Array Datenblatt: XC4010E.pdf

€ 50 .00*

Xilinx

XC4013-4PQ208C

Field-Programmable Gate Arrays Datenblatt: XC4013.pdf

€ 25 .00*

Xilinx

XC4013XL-3PQ208C

Field-Programmable Gate Arrays Number of LABs/CLBs: 576 Number of Logic Elements/Cells: 1368 Total RAM Bits: 18432 Number of I/O: 160 Number of Gates: 13000 Voltage - Supply: 3V to 3.6V Operating Temperature: 0°C to 85°C (TJ) Datenblatt: XC4013XL.pdf

€ 37 .10*

Xilinx

XC4020XLA-09PQ208I

Field Programmable Gate Arrays Supply Voltage: 3.0V - 3.6V Logic Cells: 1862 CLB Matrix: 28 x 28 Maximum I/O Accessible per Package: 160 Datenblatt: XC4020XLA.pdf

€ 37 .50*

Xilinx

XC4028XLA-09BG256C

Field Programmable Gate Array Datenblatt: XC4028XLA.pdf

€ 40 .00*

Xilinx

XC5210-6PC84C

Beschreibung: Field Programmable Gate Array Datenblatt: XC5210.pdf

€ 20 .00*

Motorola

XC56156FE60

16bit General Purpose Digital Signal Processor — Up to 30 Million Instructions Per Second (MIPS) – 33 ns instruction cycle at 60 MHz — Up to 180 Million Operations Per Second (MOPS) at 60 MHz — Highly parallel instruction set with unique DSP addressing modes — Two 40-bit accumulators including extension byte — Parallel 16 ´ 16-bit multiply-accumulate in 1 instruction cycle (2 clock cycles) — Double precision 32 ´ 32-bit multiply with 72-bit result in 6 instruction cycles — Least Mean Square (LMS) adaptive loop filter in 2 instructions — 40-bit Addition/Subtraction in 1 instruction cycle — Fractional and integer arithmetic with support for multiprecision arithmetic — Hardware support for block-floating point FFT — Hardware-nested DO loops including infinite loops — Zero-overhead fast interrupts (2 instruction cycles) — Three 16-bit internal data buses and three 16-bit internal address buses for maximum information transfer on-chip

€ 6 .00*

Torex Semiconductor Ltd.

XC62AP5002PR

Beschreibung: LDO voltage regulator

€ 0 .10*

Motorola

XC68HC705X16FU

Beschreibung: HCMOS Microcontroller Unit Datenblatt: XC68HC705.pdf

€ 10 .00*

Motorola

XC68HC705X32CFU

Beschreibung: HCMOS Microcontroller Unit Datenblatt: XC68HC705.pdf

€ 10 .00*

Motorola

XC68HC708AZ60CFU

Beschreibung: 8 Bit Microcontroller Datenblatt: XC68HC708.pdf

€ 12 .00*

Motorola

XC68HC908AZ60CFU

Beschreibung: 8 Bit MCU 60K Flash Datenblatt: MC68HC908A.pdf

€ 9 .00*

Xilinx

XC7336-15PC44C

36-Macrocell CMOS EPLD 100% PCI compliant High-drive 24 mA output I/O operation at 3.3 V or 5 V Power management options Multiple independent clocks Number of Macrocells: 3-4 Number of Function Blocks: 4 Number of Flip-Flops: 36 Number of Fast Inputs: 12 Number of Signal Pins: 38 Datenblatt: XC7336.pdf

€ 2 .42*

Xilinx

XC95144-7PQ160C

High Performance CPLD Delay Time tpd(1) Max: 7,5ns Voltage Supply - Internal: 4.75V to 5.25V Number of Logic Elements/Blocks: 8 Number of Macrocells: 144 Number of Gates: 3200 Number of I/O: 133 Operating Temperature: 0°C to 70°C (TA) Datenblatt: XC95144XL.pdf

€ 14 .15*

Xilinx

XC95144XL-10CS144C

High Performance CPLD Lead Finish: Tin/Lead Max Processing Temp: 240 Maximum Internal Frequency: 111.1 MHz Maximum Operating Frequency: 100 MHz Maximum Operating Supply Voltage: 3.6 V Maximum Propagation Delay Time: 10 ns Minimum Operating Supply Voltage: 3 V Number of User I/Os: 117 Operating Temperature: 0 to 70 °C Product Dimensions: 12 x 12 x 0.65 mm Datenblatt: XC95144XL.pdf

€ 4 .00*

Xilinx

XC95144XL-7TQ144C

High Performance CPLD Datenblatt: XC95144XL.pdf

€ 23 .30*

Xilinx

XC95288XL-10BG256I

Beschreibung: High Performance CPLD Datenblatt: XC95288XL.pdf

Varianten ab 8,00 €*

€ 50 .00*

Xilinx

XC9572XL-10TQG100I

High Performance CPLD Operating Supply Voltage: 3.3 V Number of Macrocells: 72 Number of I/Os: 72 I/O Maximum Operating Frequency: 178 MHz Propagation Delay - Max: 10 ns Memory Type: Flash Number of Gates: 1600 Number of Logic Array Blocks - LABs: 4 Operating Supply Current: 20 mA Minimum Operating Temperature: -40 C Maximum Operating Temperature: + 85 C Datenblatt: XC9572XL.pdf

Varianten ab 9,50 €*

€ 10 .30*

Xilinx

XC9572XL-7TQ100C

High Performance CPLD Operating Supply Voltage: 3.3 V Number of Macrocells: 72 Number of I/Os: 72 I/O Maximum Operating Frequency: 178 MHz Propagation Delay - Max: 7.5 ns Memory Type: Flash Number of Gates: 1600 Number of Logic Array Blocks - LABs: 4 Operating Supply Current: 20 mA Minimum Operating Temperature: 0 C Maximum Operating Temperature: + 70 C Datenblatt: XC9572XL.pdf

€ 8 .25*

Xilinx

XCR3032XL-5CS48C

Beschreibung: 32 Macrocell CPLD Datenblatt: XCR3032XL.pdf

€ 2 .25*

Xilinx

XCR3384XL-7FT256C

384 macrocell CPLD - Low power 3.3V 384 macrocell CPLD - 7.0 ns pin-to-pin logic delays - System frequencies up to 135 MHz - 384 macrocells with 9,000 usable gates - Optimized for 3.3V systems - Ultra low power operation - Typical Standby Current of 18 ?A at 25° C - 5V tolerant I/O pins with 3.3V core supply - Advanced 0.35 micron five layer metal EEPROM process - Fast Zero Power™ (FZP) CMOS design technology - 3.3V PCI electrical specification compatible outputs Datenblatt: XCR3384XL.pdf

€ 50 .00*

Xilinx

XCS20-3PQ208C

Embedded - FPGAs (Field Programmable Gate Array) Number of LABs/CLBs: 400 Number of Logic Elements/Cells: 950 Total RAM Bits: 12800 Number of I/O: 160 Number of Gates: 20000 Voltage - Supply: 4.75V to 5.25V Mounting Type: Surface Mount Operating Temperature: 0C to 85C Datenblatt: XCS20-3PQ208C.pdf

€ 20 .33*

Xilinx

XCS20XL-4PQG208I

Spartan-XL 3.3V FPGA Automotive IQ 3.3V supply for low power with 5V tolerant I/Os Power down input Higher performance Faster carry logic More flexible high-speed clock network Latch capability in Configurable Logic Blocks Input fast capture latch Optional mux or 2-input function generator on outputs 12 mA or 24 mA output drive Enhanced Boundary Scan Express Mode configuration Datenblatt: XCS20XL.pdf

€ 21 .00*