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Texas Instruments
TVP3025-175PCE
Video Interface Palette 64-Bit-Wide Multiplexing Pixel Bus Compatible with the S3 Vision964 and 86C928 Brooktree BT485 Register Map Emulation Supports System Resolutions of: 1600 ×1280 × 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz, 72, and 76-Hz Refresh Rate 1536 × 1152 × 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz, and 72-Hz and Higher Refresh Rates 1280 × 1024 × 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz and 72-Hz and Higher Refresh Rates 1024 × 768 × 1, 2, 4, 8, 16, 24 Bits/Pixel @ 60-Hz and 72-Hz and Higher Refresh Rates And Lower Resolutions Direct-Color Modes: 24-Bit/Pixel with 8-Bit Overlay 16-Bit/Pixel (5, 6, 5) XGA Configuration 16-Bit/Pixel (6, 6, 4) Configuration 15-Bit/Pixel With 1 Bit Overlay (5, 5, 5, 1) TARGA Configuration 12-Bit/Pixel With 4 Bit Overlay (4, 4, 4, 4) True-Color Modes: 24-Bit/Pixel With Gamma Correction 16-Bit/Pixel (5, 6, 5) XGA Configuration With Gamma Correction 16-Bit/Pixel (6, 6, 4) Configuration with Gamma Correction 15-Bit/Pixel (5, 5, 5) TARGA Configuration With Gamma Correction 12-Bit/Pixel (4, 4, 4) With Gamma Correction RCLK/SCLK/LCLK Data Latching Mechanism Allows Flexible Control of VRAM Timing Direct Interfacing to Video RAM Support for Split Shift Register Transfers 135-, 175-, and 220-MHz Versions Integrated Pixel Clock and Memory Clock PLLs On-Chip Hardware Cursor: 64 × 64 × 2 Cursor (XGA Functionally Minimum Operating Temperature: 0 C Maximum Operating Temperature: + 70 C

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24 .62*
Texas Instruments
TVP5150PBS
Beschreibung: Ultralow-Power NTSC/PAL Video Decoder Datenblatt: TVP5150PBS.pdf

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2 .50*